Are you designing a board with high-speed chipsets on either end of the link? You own the interconnect—and the risk. As clock and data rates climb, maintaining signal integrity becomes critical for ...
Join our webinar to learn how the 16 GHz R&S RTP164B oscilloscope leverages signal integrity tools like eye diagrams and jitter analysis for debugging high-speed interfaces and ensuring reliable ...
Join us on April 21, 2011 at noon ET as SIGNAL Editor-in-Chief Robert K. Ackerman talks with Mercury Computer Systems' Marc Couture and Tom Roberts in "Detect, Deceive and Defeat: Increasing the HPOI ...
As every engineer learns at an early stage, clock edges must be obeyed. In the digital domain, synchronization through global and local clock trees, slew rate and rising/falling times all combine to ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results