MIPS S8200 Delivers Software-First RISC-V NPU To Enable Physical AI at the Autonomous Edge

MIPS, a GlobalFoundries company, today unveiled details of the MIPS S8200 processor IP to enable next-generation AI workloads ...
Hackaday

SiFive Introduces RISC-V Linux-Capable Multicore Processor

Slowly but surely, RISC-V, the Open Source architecture for everything from microcontrollers to server CPUs is making inroads in the community. Now SiFive, the major company behind putting RISC-V ...
VentureBeat

Synopsys expands processor designs with RISC-V ARC-V Family

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Synopsys announced its plans for expanding its processor intellectual ...
VentureBeat

RISC-V grows globally as an alternative to Arm and its license fees

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More ARM is the most successful microprocessor architecture on the planet, ...
Phys.org

A 32-bit RISC-V processor made using molybdenum disulfide instead of silicon

RV32-WUJI. a, Bottom, 24 WUJI chips produced on a 4-inch sapphire wafer. Top, zoomed-in optical microscope image showing a single die with an area of 6 mm × 6 mm, consisting of 5,900 MoS 2 transistors ...
Yahoo Finance

ECARX Debuts EXP01 Processor at RISC-V Summit Europe 2025, Outlines Next-Generation MCU Roadmap and Global RISC-V Strategy

SHANGHAI, May 16, 2025 (GLOBE NEWSWIRE) -- ECARX Holdings Inc. (Nasdaq: ECX) (“ECARX” or the “Company”), a global mobility tech provider, announced the debut of its EXP01 processor built on the RISC-V ...
Hackaday

A RISC-V That The Rest Of Us Can Understand

There is great excitement in the world of microprocessors, surrounding the RISC-V architecture. This is an open source modular instruction set specification that has seen implementations on FPGAs, and ...
Semiconductor Engineering

Flexible IGZO RISC-V Microprocessor

A new technical paper titled “Bendable non-silicon RISC-V microprocessor” was published by researchers at Pragmatic Semiconductor, Qamcom, and Harvard University. From the abstract: “Here we present ...
Liliputing

LilyGo T-Display P4 handheld has an ESP32-P4 RISC-V processor and a 4.1 inch display

The T-Display P4 also has an ESP32-C6 chip with support for WiFi 6 and Bluetooth 5, an SX1262 LoRa module, a 2MP MIPI camera, a 9-axis motion sensor, a microSD card reader, a headphone jack, and two ...
Design-Reuse

A Bendable Non-silicon RISC-V Microprocessor

Today Nature journal publishes Pragmatic Semiconductor’s latest research article, a Bendable Non-silicon RISC-V Microprocessor, demonstrating the world’s first 32-bit microprocessor in a flexible ...
Semiconductor Engineering

Framework Based on an RISC-V Microprocessor Supporting LiM Operations

A new technical paper titled “RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures” was published by researchers at Politecnico di Torino (Italy), Univerity of Tor Vergata (Italy), and ...
TechRepublic

64-Bit RISC Processor Design Using Verilog

The Reduced Instruction Set Computer (RISC) is a microprocessor design principle that favors a smaller and simpler set of instructions that all take same amount of time to execute. RISC architecture ...