EDN

LDPC: Another Key Step Toward Shannon

For communication designers, especially those in the networking and wireless field, the Shannon limit can be seen as the Holy Grail. And, since being first defined in ...
EDN

Low power LDPC decoder created using high level synthesis

HLS methodology allows the hardware design to be completed at a higher level of abstraction such as C/C++ algorithmic description. This provides significant time and cost savings, and paves the way ...
Design-Reuse

Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding

This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...
Computerworld

Channel coding: Is there anywhere left to go?

Channel coding, aka, error control codes, is a foundational building block in almost all modern communication systems. Over the decades there has been a long list of ...